Nanotechnology has become a very important tool in the scaling of devices and more particularly in integrated circuit manufacturing techniques. For example, nanowires are now being used to form transistors in integrated circuits, which may be used for various devices such as, for example, LCD panels. Currently, though, nanowires are fabricated using a “top-down” technique. That is, nanowires are fabricated in a vertical orientation. However, this traditional methodology cannot achieve the precision required for certain electronics.
For example, in the top down methodology, a silicon nanowire is formed by etching from a top, downwards into a silicon material. This forms a tightly clustered plurality of vertically oriented nanowires, i.e., perpendicular with respect to the planar surface of the silicon material. However, in this orientation it is very difficult to change the characteristics of the nanowires prior to breaking them from the silicon material. Specifically, as the nanowires are densely packed (e.g., tightly clustered) and formed in a vertical orientation, it is difficult to gain access to them in order to make any modifications such as, for example, change their shapes or provide a silicide implant.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.